CURRENT RESEARCH
ATLAS: In the ATLAS Phase-II upgrade, the readout will digitize 180,000 LAr channels at 14 bits (with a high and low gain) and 40 MHz. The work involves front-end ASIC design being done at TRIUMF and back-end digital electronics (called a LASP) design being done at Victoria and McGill. Canada will take responsibility for the development of the FPGA firmware that receives the data stream from the frontend ASIC’s. The data will be sent over multiple optical fibers using a CERN-wide protocol called lpGBT that is being developed.
I have established himself as an expert in developing firmware for particle physics applications. I have given talks at ATLAS plenary meetings about my work and summarized the progress of the ATLAS liquid argon (LAr) calorimeter off-detector processing board for the high-luminosity LHC (HL-LHC). I have developed the firmware interface that will use the lpGBT protocol to receive ADC data from the front-end boards (FEBs).
I am knowledgeable about INTEL and Xilinx FPGAs, the two main high-end vendors. Recently, I have used a Xilinx board to drive a prototype CERN multiplexor (lpGBT) and optical driver (VTRx+). I created a complete model system with a digital simulation of six channels of the LAr on-detector frontend electronics, through a back-end processor and readout by a CERN FELIX board.
Recently, I have started working with NIKHEF in Holland to develop firmware to implement the INTERLAKEN data transmission protocol. This is necessary for the INTEL based transceivers on the LAr project to exchange data with the Xilinx transceivers used by the trigger.
I am working with groups in France (Saclay and CPPM) and Germany (TU Dresden). I am recognized as a critically needed expert by ATLAS, and am one of the few people who can sign off firmware before it is added to the mainstream of the project code. In addition, I have also been tasked with maintaining the software tools used by the LASP framework and providing feedback to continually improve the framework. I am also helping undergraduate and graduate students lear
Darkside 20k: Darkside-20k (DS20K) is an international dark matter detection experiment based at the Gran Sasso National Laboratory in Italy. The collaboration is planning, building, and operating a series of liquid argon time projection chambers (TPCs) that are employed at the Gran Sasso National Laboratory in Assergi, Italy. The Canadian group includes SNOLAB, and TRIUMF Laboratories, and the universities of Alberta, Queens, and Carleton. ry for the INTEL based transceivers on the LAr project to exchange data with the Xilinx transceivers used by the trigger.
For data acquisition the experiment will have about 180 waveform digitizers (CAEN-VX2740), each with 64 channels performing 16-bit digitization of signals from the detector at 125MHz. These digitizers will be installed in several VME crates, each holding 18 digitizers and a 'Crate Data Manager' (CDM). There will also be a single central 'Global Data Manager' (GDM). Data will be moved between the digitizers and the GDM using a custom ASIC. I am currently working on the transmission of data between the CDM and the VX2740, which uses 8b10b encoding. ry for the INTEL based transceivers on the LAr project to exchange data with the Xilinx transceivers used by the trigger.
PHD RESEARCH
Belle II is the detector of an e+e- collider that will be built at KEK lab in Tuskuba, Japan. My goal was to understand the simulation of beam backgounds (Touschek, beam gas, and radiative Bhabha), and determine whether the simulations match reality. To that end, I installed He-3 thermal neutron detectors into the commissioning detector of Belle II, known as the BEAST II. In addition, I studied the simulations to see what the effect of the beam backgrounds would be on the electromagnetic calorimeter. I also studied shielding options to mitigate these backgrounds.
CERTIFICATES
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